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Online Seminar: Smarter Hardware Prediction Mechanisms

Akanksha Jain: Research Associate, University of Texas at Austin

Event Details

Monday, March 30, 2020
4-5 p.m.

Abstract: The performance of many applications is limited by large memory access latencies. In this talk, I will present significant advances to two foundational techniques---caching and prefetching---that aim to mitigate this bottleneck. A common theme is the use of idealized design points, which at first glance seem impossible or infeasible, as a key building block towards highly effective and practical solutions. 

I will start by presenting a cache replacement policy that leverages Belady's optimal but clairvoyant algorithm in the design of a practical solution. This policy won the second Cache Replacement Championship, and it inspired us to create new optimal algorithms for complex scenarios. I will then briefly present a series of work in irregular data prefetching that makes a prohibitively expensive prefetching technique practical via new data representations.

Finally, I will discuss the role that machine learning can play in improving hardware systems, and I will present a novel approach that uses machine learning as a white-box tool to build practical hardware predictors. I will conclude by discussing my vision for intelligent, high-performant memory systems for future hardware systems.

Bio: Akanksha Jain is a Research Associate at the University of Texas at Austin.  She received her PhD in Computer Science from The University of Texas in December 2016.  In 2009, she received the B. Tech and M. Tech degrees in Computer Science and Engineering from the Indian Institute of technology Madras. Her research interests are in computer architecture, with a particular focus on the memory system and on using machine learning techniques to improve the design of memory system optimizations.