MadSystems Seminar

Speaker: Daniel S. Berger (Microsoft Azure and University of Washington)
Abstract: CXL introduces new opportunities for memory expansion, cross-host memory pooling and sharing. However, its practical adoption is shaped by hardware constraints that directly impact system software and applications. This talk explores key hardware constraints in CXL pod design highlighting scaling limits in existing “fully connected” approaches based on switches and multi-ported devices. We introduce “loosely connected” CXL pods, which open a new design space including a range of new tradeoffs. We present preliminary evaluation results that highlight the benefits of our new pod design for some applications, and the challenges for others.